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UVM Driver
25 Jun 2025
In the last article, we learnt about UVM sequencer which acts a bridge between sequence and driver. But sequencer just manages the flow of transaction. How these transactions are further sent to the DUT? UVM provides UVM Driver which is responsible for converting these transactions into actual…
UVM Sequencer
18 Jun 2025
Previously we have seen how the test stimulus is created using sequence and sequence item. But how these stimulus is passed on to the DUT? UVM provides a component known as sequencer which acts as a bridge between sequence and driver (component which actually drives the signal to DUT). UVM…
UVM Sequence
24 Nov 2024
In the last article we learnt to implement sequence item. Continuing further in our UVM track, in this article we will explore UVM sequences, their purpose, and how to define and use them effectively. A UVM sequence is a fundamental element in UVM testbenches that generates transactions for…
UVM Sequence Item
20 Nov 2024
We have till now seen the classes which makes the base of all other classes in UVM. From this article we will start learning about the UVM classes which we use everyday. We will start from sequence item and move to upper level objects/components slowly. In the world of UVM-based testbenches, UVM…
UVM Component
16 Mar 2024
In this article we will see how custom component classes are implemented. We will explore in depth different methods present in base class which can be overridden to achieve the phasing mechanism. What are UVM Component? UVM Components, as we have already discussed in an earlier article, are the…